Advanced Digital Design with the Verilog HDL

Great review and good coverage of HDL for myself. Has good examples and explanation of them in the text. Explanations are in concise and organized manner. Good book for beginners or great review and good reference to have for the experienced HDL designer.

The book is in perfect condition.

This is the best book that I have found for Verilog synthesis. There are many good books on Verilog, but most of them focus on simulation. This book is specifically useful for synthesis.The book seems intended to be used for a course on digital logic design. The first few chapters deal with digital logic design generally, and can be ignored. The discussion of Verilog begins after 100 pages in chapter 4.The core of the book is chapters 4 through 7, which describe how to define digital logic with Verilog. This is approximately 300 pages of description, discussion, and examples. The examples are well written, and very useful. The examples show, in a simple and straightforward manner, how to write Verilog that synthesizes well.Chapter 8 covers programmable logic devices, such as CPLDs and FPGAs. Unfortunately, the focus of the chapter is on specific device families, and is only of historical interest. For example, none of the Xilinx FPGAs discussed would be recommended in a new design. If the chapter had covered the basic concepts of device categories of interest, it might remain useful.The last few chapters cover some advanced topics, such as digital signal processing. A few of the topics covered are interesting. Most are too incomplete to be useful, and I believe that some of them (such as FIR filters) will not synthesize in a realistic case.The appendicies are extensive, and provide a reference for Verilog.The strength of the book is that it is the only one I have found that covers Verilog synthesis clearly. That portion of the book is a pleasure to use. The weakness of the book is that large sections are essentially irrelevant. It is a 1000 page book that would make a good 400 page book.The book would be significantly improved by an update, especially to Verilog 2001. In the current edition, Verilog 2001 is mentioned only in an appendix.

Simply put, this is an excellent book. I have five books on my bookshelf covering HDL, and this book is by far the most informative and practical. The number of examples containing Verilog code, a test bench, a synthesized netlist, and simulation results is incredible. It covers some very important topics in detail that my other books don't even mention (design partitioning, clock domain synchronization, and proper gating of clocks immediately come to mind). I especially like the in-depth treatment the book gives to writing sythesizable code. Synthesis isn't an after thought; it is a primary focus exactly as it should be. The index is sufficient and larger than most books, but this book deserves more.As an experienced engineer and engineering manager, I have used the text to provide examples, algorithms, and to instruct my engineering staff. This book is not only my main Verilog book, but it is my digital design reference as well.

Within a few weeks of owning it the book binding to the spine fell apart. Very poor quality.

I was (and still am) looking for a concise, accurate, and complete description (User's Guide, so to speak), for Verilog HDL language.This book is extremely heavy on digital logic design and very light on the Verilog (with the devotion to the latter being more-or-less of secondary focus (the book is rife with examples on how to use Verilog to "do this" after lengthy descriptions of complex logic implementation). So I don't feel like I can legitimately give it the 1-star that the book ended up being worth to me, since I didn't pay much attention to it upon realizing that the information I'm looking for is either not there or sparsely interspersed among agonizingly detailed pictures of gate structures for multipliers, dividers, etc... I'm a professional engineer who doesn't need a textbook on logic design, but could use a good Verilog reference manual (as an alternative to google searches) to help answer advanced syntax & feature questions that periodically pop up in my work. I have an old (pre-Verilog 2001) textbook that's pretty good for this, but devoid of the Verilog 2001 & System Verilog advancements. I still haven't found a decent focused, accurate, well-organized, & complete up-to-date Verilog reference. Somebody please write one!

1.1.12 physical and electrical design rule checks are usefull.Logican design rules are provided by Design style guide by STARC and hdlab.2.5 Glitches and Hazards are important on this viewpoint.Two type of hazards, static and dynamic are explained preciously.Static hazards are caused by differential propagation delays on reconvergent fanout paths.If an input transition is supposed to cause a single transition in an output, but causes it two or more transitions before it reaches its expected value, then A circuit has a dynamic hazard. (2.5.5)This book teaches more and more.So I recommend this book to the textbook for study verilog-hdl with design style guide 2001 verilog-hdl.

The book covers too many topics, and almost those topics can be found in other books. For me, it is not easy to understand explains provided in this book. This book seem to fit academic, for classes... not for engineers or people who are going to work for companies.I think engineers like me are looking for books more practical, written by people have been working for years in industry. Hopefully those people are willing to share their experience earned through hardworking, sweat...